SYNPLE—System Level Analysis and Simulation
Allows you to capture your MEMS at a schematic level. Your de-sign can then be quickly iterated and optimized at different gran-ularities. Sophisticated synthesis algorithms can automatically convert your schematic into mask layout, 3D or better yet a meshed structure for full multiphysics analysis.
SYNPLE includes cutting edge schematic capture and simulation tools allowing you to take a hierarchical ap-proach to the design space. SYNPLE provides a large mul-ti-domain library of electrical, mechanical, thermal, and MEMS libraries. These elements may be combined in an effortless drag-and-drop fashion and then wired to create schematics of multi-domain systems. As a result, you can quickly survey a large design space before initiating a de-tailed analysis and verification process.
Domain Synthesis and Simulation Hierarchical multi-domain design
Schematic based design exploration
3D Visualize simulation results
Schematic to mask
Schematic to process flow
Schematic to 3D model
Schematic to mesh
QUADRATURE ERROR CONTROL
System analysis to FEA/BEA
SYNPLE to VHDL
Displacement time delays of the mirrors array
Simulate the MEMS thick-resist physical lithography process, and use the physical simulation algorithm and physical model to accurately reflect the SU8 and other thick-resist lithography effects. ◆ Support the four-step simulation of image forming, exposure, post-baking, and development; ◆ Precise lighting model before and after exposure; ◆ Support multi-layer mask file layout settings; ◆ Support fine measurement of 3D display results.
精准的三维工艺物理模拟工具。 ◆ 模拟工艺流程生成的器件的三维模型,动画形式显示工艺过程； ◆ 支持绝大多数MEMS工艺仿真，包括：各向同性/异性淀积，各向同性/异性刻蚀，湿法刻蚀，键合，光刻以及CMOS工艺中的氧化/注入等； ◆ 高精度模式和快速模式两种仿真模式可选； ◆ Si DRIE和湿法各向异性刻蚀算法源自成熟的单工艺仿真算法模块，历经丰富的实践验证； ◆ 支持III-V族半导体(InP)等多种化合物半导体物理仿真工艺. ◆ 支持spray准各向同性湿法刻蚀工艺 ◆ 基于GPU大规模并行计算 ◆ 采用体素绘制技术，支持旋转、平移、缩放、剖面等功能 ◆ 支持按工艺分层显示，方便观察器件内部结构信息； ◆ 支持PPT、AVI、JPG等多种格式输出。
Powerful process demonstration tool based on 3D voxel manipulation. ◆ Display the technological process in the form of animation; ◆ Simulate the 3D model of the device after any process step; ◆ Support most MEMS process simulations, including: isotropic/anisotropic deposition, isotropic/anisotropic etching, wet etching, bonding, photolithography, and oxidation/implantation in CMOS processes; ◆ Using voxel graphics technology, more realistic demonstration of three-dimensional complex device structure; ◆ Using volume rendering technology, users can view the internal information of the device through functions such as rotation, translation, zoom, and section; ◆ Use geometric algorithms to simulate deposition and etching processes more realistically;
The advanced, automatic control-based unit etching simulation technology can obtain accurate <100>, <110> single crystal silicon wafer KOH and TMAH anisotropic etching simulation results, and can also be used for complex layout and long-term etching. ◆ Top, bottom and double-sided etching of wafers; ◆ Multiple cut-off layers and multiple etchings of different masks on a single wafer; ◆ Reflect the impact of misaligned masks, and compensation techniques; ◆ Predict the influence of etchant temperature, concentration and etching time on device shape; ◆ TMAH and KOH etching rate database, users can also customize the etching rate; ◆ To measure the effect of vertical etching in the case of coupled anisotropic etching; ◆ Three-dimensional graphics and cross-section visualization; ◆ Measure the distance and angle between any two points of the wafer after etching;
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